In this work, the RF and microwave noise performance of bulk and fully-depleted silicon-on-insulator (FD SOI) transistors with directly comparable topologies is investigated by means of an ensemble Monte Carlo simulator, and in the case of FD SOI devices, the influence of varying the active layer thickness is also studied. Intrinsic noise sources are calculated and analysed, and important figures of merit such as NF_min or R_n are also determined and evaluated. Moreover, a microscopic understanding of the noise phenomena is achieved, which is essential for the optimization of the transistors. FD SOI devices show a reduced influence of induced gate noise and drain noise as compared to the bulk transistor due to the minor influence of phonon scattering and energetic carriers at the pinch-off region. Whereas reducing the active layer thickness minimizes the effect of hot carriers in the noise parameters, it can lead to a degradation of other important high-frequency figures of merit such as g_m or f_T.