6 nm half-pitch lines and 0.04 µm<sup>2</sup> static random access memory patterns by nanoimprint lithography
Austin, Michael D; Zhang, Wei; Ge, Haixiong; Wasserman, D; Lyon, S A; Chou, Stephen Y; Austin, Michael D; Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, USA; Zhang, Wei; Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, USA; Ge, Haixiong; Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, USA; Wasserman, D; Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, USA; Lyon, S A; Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, USA; Chou, Stephen Y; Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, USA
Журнал:
Nanotechnology
Дата:
2005-08-01
Аннотация:
A key issue in nanoimprint lithography (NIL) is determining the ultimate pitch resolution achievable for various pattern shapes and their critical dimensional control. To this end, we demonstrated the fabrication of 6 nm half-pitch gratings and 0.04 µm<sup>2</sup> cell area SRAM metal interconnects with 20 nm line half-pitch in resist by NIL. The mould for the 6 nm half-pitch grating was fabricated by cleaving a GaAs /Al<sub>0.7</sub>Ga<sub>0.3</sub>As superlattice grown on GaAs with molecular beam epitaxy, and selectively etching away the Al<sub>0.7</sub>Ga<sub>0.3</sub>As layers in dilute hydrofluoric acid. The mould for the 0.04 µm<sup>2</sup> SRAM metal interconnects was fabricated in silicon dioxide using 35 kV electron beam lithography with polystyrene as a negative resist and a reactive ion etch with the resist as mask. Imprints from both moulds showed excellent fidelity and critical dimension control.
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